A logic analyzer captures and stores signals of a digital circuit, thereby enabling precise observation of the circuit operation. Specifically, a user sets up a trigger event and a capture scheme. A trigger event is a logical or sequential condition of signal events coming from the digital circuit. For example, a logical trigger might be “(A and B)==1,” while a sequential trigger might be “A==1 then B===1 then C==1.”
A capture scheme dictates how the signals are stored in the capture memory relative to the trigger event. For example, the capture scheme might dictate that the logic analyzer wait for the trigger event, store the signals relating to the trigger event, and then continue to store signals until the capture memory is full. Thus, the logic analyzer fills a finite amount of memory with data (signals) that the user wants.
In conventional integrated logic analyzers (ILAs), which are embedded in the logic fabric of the digital circuit, the trigger and capture functionalities are implemented independently of each other using programmable combinatorial logic. The exact number and character of each of the logic elements dictate how and when the ILA core stores data to be later uploaded and displayed to a user. This approach suffices for simple trigger and capture schemes, but does not support the more complex schemes that may be necessary in order to fully observe the operation of complex digital circuit designs. Support for such complex schemes would likely require additional custom combinatorial logic, as well as new software to support the programming of the custom combinatorial logic.